Patent
1994-03-07
1995-04-25
Lall, Parshotam S.
G06F 930
Patent
active
054106605
ABSTRACT:
A data processing system (10) executes a branch instruction in a straight line microcode sequence. During execution of the instruction, a control unit (56) is provided to decode the instruction to provide a plurality of control signals and to determine a data value with which to test a condition of the instruction. A constants generation circuit (222) generates a mask value in response to the plurality of control signals. An arithmetic logic unit (224) logically combines the mask value with the data value to produce a masked value. A zero detect circuit (246) subsequently tests the masked value to determine if it is equal to zero and provides a condition signal to indicate if the condition of the instruction was satisfied. If the condition of the instruction is satisfied, an offset value plus one is added to a program counter value. Otherwise, the program counter value is incremented by one.
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"68HC11 Reference Manual" published by Motorola, Inc. in 1989, pp. A-14, A-16 through A-20, A-23, A-25 through A-29, A31, A-33.
Divine James S.
Studor Charles F.
Apperley Elizabeth A.
Lall Parshotam S.
Motorola Inc.
Vu Viet
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