System and method for executing Advanced Encryption Standard...

Cryptography – Communication system using cryptography – Time segment interchange

Reexamination Certificate

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Details

C380S029000, C380S051000, C380S255000, C380S264000

Reexamination Certificate

active

07106860

ABSTRACT:
A system and method is presented for enciphering information using the Advanced Encryption Standard (AES) algorithm in which a subprocessor is configured to manipulate data as it is being loaded into the subprocessor memory. Thus, unlike implementations in the prior art, which require complete loading of data into a subsystem memory before data manipulation thereby creating a potential bottleneck in memory, this invention reduces the potential bottleneck in memory.

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Realization of the Round 2 AES Candidates using Altera FPGA Fischer.

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