System and method for enumerating all acyclic paths in a process

Details System and method for enumerating all acyclic paths in a process System and method for enumerating all acyclic paths in a process

1992-03-23

1994-12-06

Canney, Vincent P.

Excavating

395200, 371 112, 371 201, G06F 1300

Patent

active

053717449

ABSTRACT:
A system (30) and method is provided for enumerating acyclic paths in an information processing system. The system (30) incorporates multiple processor nodes (18) or functional units interconnected by point-to-point links (20). The hardware of the information processor is represented as a mixed graph with graph nodes (32) for processors and with graph edges (34) representing communication links (20). All the useful paths from the source nodes of the data to the destination nodes of the data are determined in accordance with the system and method of the present invention. These paths are then stored as a list in a table indexed by the source and destination nodes. Thus, when the need for a interprocessor communication path arises, the table can be consulted to find a permissible path. The system (30) efficiently performs interprocessor communication routing and can be utilized in real time.

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The Design and Analysis of Computer Algorithms, by Aho, Hopcroft & Ullman, published by Addison-Wesley, Reading Mass., 1974, pp. 195-200; pp. 44-50, Sections 2.1-2.3; pp. 111-113, Section 4.2.
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Abstract, HFTM Workshop Jun. 1989, "Fault Tolerance in the Hughes 3-D Computer", M. Little et al.

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