System and method for emulating computer architectures

Details System and method for emulating computer architectures System and method for emulating computer architectures

1994-12-22

1998-04-07

Louis-Jacques, Jacques

395375, 395527, 395376, 395737, G06F 1300

Patent

active

057375798

ABSTRACT:
When a CPU issues an instruction conforming to a second architecture, the instruction is accepted by an I/O acceptance device within a subcontroller. If an event is set in an SMI status display device in accordance with the contents of the instruction, an SMI generation device simultaneously outputs an SMI signal to the CPU. If that happens, an SMM handler executes given processing corresponding to the event, and a translated instruction is transferred to a first device control device. An instruction that can be translated by hardware circuitry is translated by an instruction translation device that comprises microcode memory. This ensures that a first device control device can be used as a structural component of hardware of a second architecture. It also allows the implementation of compatibility with a number of different computer architectures.

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