Patent
1993-08-27
1997-02-18
Kim, Matthew M.
395471, 395472, 395474, G06F 1208
Patent
active
056048823
ABSTRACT:
A multiprocessor in which processing units have local private caches and records are stored on at least a first global storage control unit. An interconnection system provides node to node data and synchronization communications between processing units and the first global storage control unit. The global storage control unit includes a coherency controller for tracking each instance of records owned by the global storage control unit currently resident on the processing units. Each processing unit executes a cache management process for freeing intervals of the local cache for the processing unit. Upon identification of an interval, the processing unit sends empty notification to the global storage control unit owning the record an instance of which was resident in the interval. Thereafter the interval is marked as invalid in a cache directory for the processing unit and indicia for the instance is deleted from a coherency directory for the global storage control unit.
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Baldus Donald F.
Hoover Russell D.
Liu Lishing
Willis John C.
Ziegler Frederick J.
Dillon Andrew J.
Gamon Owen
International Business Machines - Corporation
Kim Matthew M.
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