System and method for efficient hardware implementation of a...

Details System and method for efficient hardware implementation of a... System and method for efficient hardware implementation of a...

2008-07-01

2008-07-01

Mai, Tan V. (Department: 2193)

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

C708S603000

Reexamination Certificate

active

07395299

ABSTRACT:
An apparatus and method for efficiently calculating an intermediate value between a first end value such that the area and time required to implement this operation is minimized is described. The apparatus and method may be used to efficiently multiply a value by a fraction. A fraction is involved in calculating an intermediate value and also for multiplying by a fraction. When the denominator of the fraction is odd, the binary representation of the blending function, which is used to calculate an intermediate value, exhibits special characteristics. The special characteristics allow the present invention to, among others, avoid the use of multipliers, which require a large number of gates to implement. The method and apparatus described exploit this and other special characteristics in order to efficiently implement in hardware the blending function and to efficiently multiply a value by a fraction.

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