Computer graphics processing and selective visual display system – Computer graphic processing system – Plural graphics processors
Patent
1997-01-10
1999-08-17
Tung, Kee M.
Computer graphics processing and selective visual display system
Computer graphic processing system
Plural graphics processors
345506, 345508, 395675, G06F 1516
Patent
active
059400862
ABSTRACT:
A system and associated method for dynamically allocating vertex data to a plurality of geometry accelerators in a computer graphics system based upon the relative current capability of the geometry accelerators to process the data. This efficient distribution of vertex data substantially reduces the amount of time individual geometry accelerators remain idle, thereby increasing both the efficiency of each geometry accelerator as well as the overall parallel processing of vertex data. This selective utilization of geometry accelerators thereby results in a significant increase in the throughput performance of the computer graphics system. A computer graphics system in accordance with the present invention comprises a plurality of geometry accelerators and a distributor connected through two unidirectional buses that transmit data in opposite directions. The geometry accelerators are connected, through appropriate interfacing hardware, directly to an input bus. The geometry accelerators are also coupled to an output bus in a manner that enables them to control the flow of data generated by upstream geometry accelerators. This dual bus arrangement enables the distributor to control the allocation of vertex data while enabling the geometry accelerators to control the subsequent combining of resulting rendering data.
REFERENCES:
patent: 5394524 (1995-02-01), DiNicola et al.
patent: 5467459 (1995-11-01), Alexander et al.
"Dynamic load balancing in a distributed computer system", K. Erciyes et al, MELECON '91: Mediterranean Electrotechnical Conference, pp. 1077-1080, 1991.
Krech, Jr. Alan S.
Rentschler Eric
Scott Noel D.
Hewlett -Packard Company
Tung Kee M.
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