System and method for dynamic avoidance of a simultaneous switch

Details System and method for dynamic avoidance of a simultaneous switch System and method for dynamic avoidance of a simultaneous switch

1990-06-29

1992-11-03

Yusko, Donald J.

Communications: electrical

Continuously variable indicating

With meter reading

3642428, 36424293, 3649278, 364DIG1, 364DIG2, 370 856, G06F 1300

Patent

active

051609223

ABSTRACT:
A system and method for limiting the number of simultaneously switching outputs of an integrated circuit chip to at or below a predetermined limit for the chip during a short, predetermined time window by dynamically arbitrating request signals from discrete on-chip logic elements for assignment of output pins according to the priority of the request signals based on the type and intended use of output signals from such elements, and the immediate state of the integrated circuit chip.

REFERENCES:
patent: 4249093 (1981-02-01), Henig
patent: 4669079 (1987-05-01), Blum
patent: 4977557 (1990-12-01), Phung et al.
patent: 4993022 (1991-02-01), Kondo et al.
patent: 5001707 (1991-03-01), Kositpaiboon et al.

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