Data processing: structural design – modeling – simulation – and em – Simulating electronic device or electrical system – Software program
Reexamination Certificate
2007-09-11
2007-09-11
Rodriguez, Paul (Department: 2123)
Data processing: structural design, modeling, simulation, and em
Simulating electronic device or electrical system
Software program
C703S002000, C711S170000, C717S151000, C717S156000
Reexamination Certificate
active
10271508
ABSTRACT:
One embodiment of the present invention provides a system and method for determining a cache optimized ordering of cells in an unstructured graph. Cells bounding a region defined along a portion of a stored logically-defined grid are identified and each cell is added into an element of a level set array block in order of traversal through the region along the boundary. The level set array block is reordered for each additional cell in the data object that is contiguous to at least one such cell added previously to the level set array block. Each such additional cell is added into an element of the level set array block. Each cell remaining in the data object independent of any element in the level set array block is iteratively added.
REFERENCES:
patent: 6175957 (2001-01-01), Ju et al.
Trishul M. Chilimbi et al., “Making Pointer-Based Data Structures Cache Conscious”, 2000, IEEE, pp. 67-74.
Chen Ding and Ken Kennedy, “Improving Cache Performance in Dynamic Applications through Data Computation Reorganization at Run Time”, 1999, ACM, pp. 229-241.
Murali Annavaram et al., “Data Prefetching by Dependence Graph Precomputation”, 2001, IEEE, pp. 52-61.
Thomas Kistler and Michael Franz, “Automated Data-Member Layout of Heap Objects to Improve Memory-Hierarchy Performance”, 2000, ACM, pp. 1-16.
Josep Torrellas, Chun Xia, and Russel Daigle; “Optimizing the Instruction Cache Performance of the Operating System”; 1998; IEEE Transactions on Computers; vol. 47, No. 12; pp. 1363-1381.
Publication entitled “Improving Fine-Grained Irregular Shared-Memory Benchmarks by Data Reordering,” by Y. Charlie Hu et al., Rice University, 2000 IEEE.
Publication entitled “Memory Hierarchy Management for Iterative Graph Structures,” by Ibraheem Al-Furaih et al., University of Florida. 1998 ACM.
Park Vaughan & Fleming LLP
Proctor Jason
Rodriguez Paul
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