Patent
1996-02-02
1998-01-13
Chan, Eddie P.
39549701, 39518318, 395401, G06F 1202, G06F 1100
Patent
active
057087911
ABSTRACT:
A system and method cause the computer to automatically detect whether the computer implements a DRAM, and, if so, the architecture of the DRAM. More particularly, the system and method determine the requisite READ protocol for implementing the DRAM, and thus determine whether the DRAM implements a fast page (FP) architecture, an extended data out (EDO) architecture, or a burst extended data out (BEDO) architecture, since each architecture implements a unique READ protocol. From the analysis, the system and method determine if the DRAM is faulty, nonexistent, or of an unknown type. If the DRAM is faulty or of an unknown type, the system and method disable the DRAM.
REFERENCES:
patent: 5175835 (1992-12-01), Beighe et al.
patent: 5423028 (1995-06-01), Schieve et al.
patent: 5568651 (1996-10-01), Medina et al.
Bragdon Reginald G.
Chan Eddie P.
National Semiconductor Corporation
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