System and method for destructive purge of memory device

Static information storage and retrieval – Floating gate – Data security

Reexamination Certificate

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Details

C365S185290, C365S185330, C365S218000

Reexamination Certificate

active

07020019

ABSTRACT:
A memory purge system destructively purges the memory circuits of a memory device. The system includes a power supply for supplying a selectable voltage and current. Switching circuits electrically connect the power supply to the memory circuits of the memory device. A controller selects a voltage and current supplied by the power supply and activates the switching circuit to apply the voltage and current to the memory circuits. The controller determines whether the memory circuits have been destroyed by monitoring current flow into the memory circuits.

REFERENCES:
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patent: 5027397 (1991-06-01), Double et al.
patent: 5572696 (1996-11-01), Sonobe
patent: 5758121 (1998-05-01), Fukuzumi
patent: 6292898 (2001-09-01), Sutherland
patent: 6320787 (2001-11-01), Ikeda
patent: 6819590 (2004-11-01), Goda et al.

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