System and method for decreasing end-to-end delay during...

Details System and method for decreasing end-to-end delay during... System and method for decreasing end-to-end delay during...

2011-01-04

2011-01-04

Lee, M. (Department: 2422)

Television

Image signal processing circuitry specific to television

With details of static storage device

C345S547000

Reexamination Certificate

active

07864251

ABSTRACT:
A method for decreasing end-to-end delay in a video conferencing context is disclosed. At video conferencing system startup, a processor is initialized to receive either a top field or a bottom field of video frame data. If the first line of a new field arriving after initialization does not match a field state that the processor is initialized to, the present invention senses the state mismatch and adjusts a display buffer by one display line, and the field is stored in the display buffer. The display buffer is adjusted in order to preserve a vertical spatial relationship between the top and bottom fields.

REFERENCES:
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patent: 5568165 (1996-10-01), Kimura
patent: 6542198 (2003-04-01), Hung et al.
patent: 6581164 (2003-06-01), Felts, III et al.
patent: 6614441 (2003-09-01), Jiang et al.
patent: 6658056 (2003-12-01), Duruoz et al.
patent: 6891894 (2005-05-01), Kim et al.
patent: 7068847 (2006-06-01), Chen

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