System and method for decoupling capacitance for an...

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – Unwanted signal suppression

Reexamination Certificate

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C333S172000

Reexamination Certificate

active

06657484

ABSTRACT:

TECHNICAL FIELD OF THE INVENTION
The present invention relates generally to the field of integrated circuits, more particularly to a system and method for decoupling capacitance for an integrated circuit chip.
BACKGROUND OF THE INVENTION
Modern electronic equipment such as televisions, telephones, radios and computers are generally constructed of solid state devices. Solid state devices are preferred in electronic equipment because they are extremely small and relatively inexpensive. Additionally, solid state devices are very reliable because they have no moving parts, but are based on the movement of charge carriers.
Solid state devices may be transistors, capacitors, resistors, and other semiconductor devices. Typically, such devices are formed in and on a substrate and are interconnected to form an integrated circuit. Typically, integrated circuits are attached to a lead frame and protectively packaged to form an integrated circuit chip that can be directly connected to a printed circuit board of an electronic device. Through the printed circuit board, the integrated circuit chip is connected to other chips and to external inputs and outputs.
Packaging of an integrated circuit typically introduces inductance that can, in connection with capacitance of the integrated circuit, lead to resonance between the chip and packaging materials. The resonance is typically damped with on-chip resistance connected in series with the capacitance. Such damping, however, provides only a limited solution.
SUMMARY OF THE INVENTION
The present invention provides a system and method for decoupling capacitance for an integrated circuit chip that substantially eliminate or reduce at least some of the problems and disadvantages associated with previous systems and methods.
In accordance with one embodiment of the present invention, a system and method for decoupling capacitance for an integrated circuit chip includes coupling a load between a power supply line and the ground. A distributed resistive-capacitive (RC) filter is coupled between the power supply line and the ground in series with the load. The distributed RC filter is operable to provide decoupled capacitance to the chip.
In accordance with a specific embodiment of the present invention, the distributed RC filter includes a plurality of multi-stage RC filters. In this embodiment, the multi-stage RC filters each include a distributed first stage and a single, second stage. The multi-stage RC filters may be part of a clock distribution system.
Technical advantages of the present invention include providing an improved method and system for decoupling capacitance of an integrated circuit chip. In a particular embodiment, decoupling capacitance is provided with a distributed resistive-capacitive (RC) filter. The distributed RC filter provides resistance as needed and accordingly may be used as a single solution over a broad range of designs.
Additional technical advantages of the present invention include providing an integrated method and system for providing decoupling capacitance on an integrated circuit chip. In a particular embodiment, the decoupled capacitance provided by the distributed RC filter of a clock distribution system. Accordingly, decoupled capacitance is provided without the need of dedicated circuits and/or components.
Other technical advantages of the present invention will be readily apparent to one skilled in the art from the following figures, description and claims. Moreover, while specific advantages have been enumerated above, various embodiments may include all, some, or none of the enumerated advantages.


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