System and method for debugging a computing system

Details System and method for debugging a computing system System and method for debugging a computing system

1994-06-23

1997-03-25

Canney, Vincent P.

G06F 944

Patent

active

056153317

ABSTRACT:
A system and method for debugging a development computing system is disclosed. The BIOS in the development system includes a debug engine. Interrupt-handling macros in BIOS include an entry macro to direct debug output codes (e.g., port 80 and beep codes) to the debug engine. A near entry macro is added to BIOS-segment macros (e.g., F000 segment) which provides the offset of the debug engine. A far entry macro is added to non-BIOS-segment macros which provides the segment and offset of the debug engine. The debug engine sends the output codes to a remote host computer via a communication channel (e.g., a bi-directional parallel port) on the development system. The debug engine also saves the contents of various registers on the development system to the host computer. Thus, the invention can be used in a stackelss environment. Debug commands (e.g., memory dump, set break address) can be issued from the host computer to the development system via the communications channel. Such commands are executed on the development system in accordance with program instructions in the debug engine. Debug data associated with the development system may be sent to the host computer via the communications channel in response to a debug command (e.g., memory dump data). Thus, a user can interactively and remotely debug the development system.

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patent: 5109521 (1992-04-01), Culley
patent: 5119377 (1992-06-01), Cobb et al.
patent: 5206948 (1993-04-01), DeAngelis et al.
patent: 5228039 (1993-07-01), Knoke et al.

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