System and method for controlling ATM virtual circuit connection

Details System and method for controlling ATM virtual circuit connection System and method for controlling ATM virtual circuit connection

1995-05-26

1997-08-05

Hsu, Alpus H.

Multiplex communications

Data flow congestion prevention or control

Control of data admission to the network

370253, 370360, 370399, H04L 1256

Patent

active

056549636

ABSTRACT:
A communication control system for providing and registering a plurality of virtual circuits and sequentially transferring cells via the virtual circuits in response to request for transferring cells in an synchronous transfer mode is described. The communications control system comprises a device for determining whether or not it is permitted to transfer a cell via each virtual circuit having been registered in order to control the rate of transferring cells via the virtual circuit, and a device for erasing the registration of each virtual circuit if no cell is transferred via the virtual circuit for a predetermined time period after latest transmission on the basis of information for controlling the rate of transferring cells via the virtual circuit. In this configuration, erroneous operation is prevented which originates from overflow occurring in a counter for counting the present time.

REFERENCES:
patent: 5361253 (1994-11-01), Feijen et al.
patent: 5400336 (1995-03-01), Boyer et al.
patent: 5402412 (1995-03-01), Duffie et al.
patent: 5455917 (1995-10-01), Holeman et al.
"Generic Cell Rate Algorithm (GCRA)", ATM User-Network Interface Specification Version 3.0, Sec. 3.6.2.4.1, The ATM Forum, Sep. 10, 1993, pp. 77-79.
Y. Unekawa et al., "155Mbps ATM/AAL3/4/5 Protocol Processing LSI", Technical Report of IEICE, Jun. 23, 1994, pp. 85-92.

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