System and method for conditioning differential clock...

Details System and method for conditioning differential clock... System and method for conditioning differential clock...

2007-06-29

2009-11-03

Chang, Daniel D (Department: 2819)

Oscillators

Polyphase output

C327S144000, C327S175000

Reexamination Certificate

active

07612620

ABSTRACT:
A system and method of conditioning differential clock signals iteratively adjusts the duty cycles and phases of the clock signals. The duty cycles of the clock signals are adjusted by comparing respective voltage corresponding to the duty cycles of respective clock signals in each of the differential pairs. The result of the comparison is used to adjust the duty cycles of the clock signal until the magnitudes of the voltages are substantially equal. The phases of the clock signals are adjusted by selecting two sets of two clock signals each that are assigned relative phases that differ from each other by the same amount. The selected sets of clock signals are processed so that the duty cycles of resulting signals correspond to the phases of the clock signals. The duty cycle of these signals is measured as described above and used to adjust the phases of the clock signals.

REFERENCES:
patent: 4837781 (1989-06-01), Hickling
patent: 2007/0090866 (2007-04-01), Park et al.

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