System and method for combining integrated circuit final...

Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element

Reexamination Certificate

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C209S573000

Reexamination Certificate

active

06396295

ABSTRACT:

The present invention relates generally to integrated circuit testing systems and methods, and more specifically to systems and methods for performing final circuit performance testing and for marking the ceramic or plastic packaging in which integrated circuits are housed.
BACKGROUND OF THE INVENTION
Conventionally, after integrated circuits are diced and packaged, the integrated circuits are tested for short and open circuits from the leads extending from the packages. The circuits that fail the short and open circuit tests are discarded. The circuits that pass the short and open tests are loaded into a marking system for marking with circuit and manufacturer identification information, and then they are shipped to a final test facility. The final test facility is often at a different location from the assembly plant where the circuits are packaged.
At the final test facility, the circuits are subjected to a battery of circuit functionality tests, typically taking one to ten seconds per integrated circuit, depending on the type of integrated circuit. Some complex devices may require even longer final test times. The costs associated with final testing average several cents per integrated circuit, about half of which is attributable to the shipping of the packaged circuits to the final test facility and the cost of loading the circuits into the testers.
In accordance with the conventional circuit testing protocol, circuits that fail the final tests are marked with the same circuit and manufacturer information as circuits that pass. This creates opportunities for failed circuits to be purposely or inadvertently shipped or sold as though they were good circuits.
It is an object of the present invention to substantially reduce the cost of final testing packaged integrated circuits by combining the final testers with the integrated circuit package marking equipment.
It is another object of the present invention to prevent circuits that fail the final circuit tests from being marked with the same circuit and manufacturer information as circuits that pass.
SUMMARY OF THE INVENTION
A tester-marker system tests and marks integrated circuits. A testing station tests the integrated circuits and determines if the integrated circuits passed or failed. The integrated circuits are placed in a pass bin if the integrated circuits passed the tests. A marking station marks identification information on the integrated circuits in the pass bin.
In a method for testing and marking integrated circuits, a tester-marker system tests the integrated circuits and determines if the integrated circuits passed or failed. The tested integrated circuits are placed in a pass bin if the integrated circuits passed or a fail bin if the integrated circuits failed the tests. Identification information is marked on the integrated circuits in the pass bin.


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