System and method for circuit schematic generation

Details System and method for circuit schematic generation System and method for circuit schematic generation

2011-03-29

2011-03-29

Whitmore, Stacy A (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Integrated circuit design processing

Physical design processing

C716S119000, C716S126000

Reexamination Certificate

active

07917877

ABSTRACT:
The present invention provides a system and method for generating circuit schematic that includes extracting connectivity data of a plurality of devices from a netlist, categorizing the plurality of devices into groups, placing Schematic Analog Placement Constraints on all the instances by identifying instances among the groups that match with a circuit template (in-built as well as user-specified), creating a BFS instance tree of tree instances, creating a two terminal device clusters and creating instance attachments. Using the constraints during grid based placement and eventually generated schematic which look like analog schematic.

REFERENCES:
patent: 6980211 (2005-12-01), Lin et al.
patent: 7571411 (2009-08-01), Hentschke et al.
patent: 2005/0107993 (2005-05-01), Cuthbert et al.
patent: 2005/0278670 (2005-12-01), Brooks et al.
patent: 2009/0083689 (2009-03-01), Ringe et al.
patent: 2010/0095262 (2010-04-01), Garg et al.

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