System and method for analyzing defects on a wafer

Details System and method for analyzing defects on a wafer System and method for analyzing defects on a wafer

2011-07-19

2011-07-19

Wachsman, Hal D (Department: 2857)

Data processing: measuring, calibrating, or testing

Measurement system in a specific environment

Electrical signal parameter measurement system

C702S035000, C702S058000, C324S537000, C700S110000

Reexamination Certificate

active

07983859

ABSTRACT:
A defect analyzer system having a program storage device storing instructions and an arithmetic unit executing the instructions. The system divides a defect analyzing region of a wafer into a plurality of grid squares and classifies the grid squares into a plurality of groups. The system then matches the defect information with the defect analyzing region. The defect information includes defect positions and sizes detected in the defect analyzing region. The system calculates a defect size distribution for each defect size in each of the groups, compares the defect size distribution and a predetermined estimation distribution for each of the groups, and calculates a difference. The system then compares the difference of each of the groups and a predetermined threshold value, extracts the group having the difference equal to or smaller than the predetermined threshold value, and outputs the defect information corresponding to the extracted group.

REFERENCES:
patent: 5991699 (1999-11-01), Kulkarni et al.
patent: 6549863 (2003-04-01), Morinaga
patent: 7222026 (2007-05-01), Matsushita et al.
patent: 2006/0100730 (2006-05-01), Parkes et al.
patent: 2008/0058977 (2008-03-01), Honda

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