System and method for adaptive equalization of a waveform...

Pulse or digital communications – Equalizers – Automatic

Reexamination Certificate

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Details

C708S323000

Reexamination Certificate

active

06188721

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to adaptive equalizer systems and more specifically to a high-speed, digitally-controlled adaptive equalizer system for facilitating computer communications in a local area network.
2. Background Art
Equalization restores a data waveform'frequency components which are lost when the waveform propagates through data transmission channels such as cables. Thus, equalization permits the received waveform to closely resemble the originally transmitted waveform. A typical application of an equalization scheme in the data communications art is to facilitate digital computer communication among workstations in a local area network (LAN).
The magnitude of frequency loss in a received waveform depends upon the length of the data transmission channel. Longer transmission channels cause losses across all frequencies but with greater losses in high frequency signals. Thus, the farther apart two workstations are in a LAN, the more likely the received data will be: attenuated by frequency, shifted in phase (frequency dispersion), and attenuated with less signal-to-noise (S/N) due to crosstalk.
Adaptive equalizer systems determine and provide equalizations required for a received waveform to ultimately resemble the originally transmitted waveform.
FIG. 1
shows a conventional adaptive equalizer system
100
in which workstation
102
transmits waveform
105
via transmission line
110
to workstation
115
. Waveform
105
is typically the MLT
3
three-level code signal. Transmission line
110
is typically unshielded twisted pair wiring. However, transmission line
110
may also include shielded twisted pairs, attachment unit interface (AUI) cables, copper distributed data interface (CDDI), coaxial transmission lines, or other types of wiring. Workstations
102
and
115
may also include other types of transmitters/receivers in a fast Ethernet (100 Mbps Ethernet) or 100Base-X communications network system. Additional details on CDDI (FDDI) are discussed in Fibre Distributed Data Interface (FDDI)—Part: Token Ring Twisted Pair Physical Layer Medium Dependent (TP-PMD), American National Standard for Information Systems (Mar. 1, 1995) and in U.S. Pat. No. 5,305,350 issued to Budin et al. on Apr. 19, 1994, both of which are fully incorporated herein by reference thereto as if repeated verbatim immediately hereinafter.
The receiving end of transmission line
110
is connected through a data jack
120
, such as an RJ
45
jack, to the primary winding of a decoupling transformer
125
which decouples the received waveform
105
′. The secondary winding of decoupling transformer
125
is connected to a transceiver chip
130
which includes an equalizer (gain stage)
135
, a peak detector and comparator
140
and slicers
145
and
150
. Conventional equalizer units are also shown and described in U.S. Pat. No. 5,115,213 issued to Eguchi on May 19, 1992; in U.S. Pat. No. 4,187,479 issued to Ishizuka on Feb. 5, 1980; in U.S. Pat. No. 4,689,805 issued to Pyhalammi et al. on Aug. 25, 1987; in U.S. Pat. No. 5,036,525 issued to Wong on Jul. 30, 1991; in U.S. Pat. No. 4,275,358 issued to Winget on Jun. 23, 1981; in U.S. Pat. No. 4,378,535 issued to Chiu et al. on Mar. 29, 1983; in U.S. Pat. No. 4,768,205 issued to Nakayama on Aug. 30, 1988; in U.S. Pat. No. 5,337,025 issued to Polhemus on Aug. 9, 1994; in U.S. Pat. No. 5,293,405 issued to Gersbach et al. on Mar. 8, 1994; in U.S. Pat. No. 4,459,698 issued to Yumoto et al. on Jul. 10, 1984; in U.S. Pat. No. 4,583,235 issued to Domer et al. on Apr. 15, 1986; in U.S. Pat. No. 4,243,956 issued to Lemoussu et al. on Jan. 6, 1981; in U.S. Pat. No. 4,961,057 issued to Ibukuro on Oct. 2, 1990; and in L. J. Giacoletto (editor),
Electronics Designers' Handbook
(2
nd
d.), McGraw-Hill Book Company, New York, N.Y. (1977). The references mentioned above are incorporated herein by reference. Peak detector circuits or methods used in adaptive equalizers are also disclosed in U.S. Pat. Nos. 5,293,405, 4,768,205, 4,592,068, 4,459,698, 4,873,700 and 5,036,525, which are incorporated by reference.
A peak reference source
155
generates a “PEAK-REFERENCE” signal having a specific amplitude equal to the pre-propagation amplitude of waveform
105
at some frequency. Peak detector
140
compares the absolute amplitude value of received waveform
105
′ (at a specific frequency) with the amplitude value of the PEAK-REFERENCE signal and generates an “ERROR” signal based on the difference in amplitudes of both signals. The ERROR signal propagates, via feedback loop
142
with gain stage
144
, to equalizer
135
, which equalizes received waveform
105
′ to resemble originally-transmitted waveform
105
.
Slicer
145
outputs via line
160
an output signal “SLICER
1
,” while slicer
150
outputs via line
165
an output signal “SLICER
2
.” The SLICER
1
and SLICER
2
signals slice equalized waveform
105
′ at predetermined voltage levels and are also driven into OR gate
167
which outputs a non-return-to-zero-inverted (NRZI) signal. (
FIG. 2
shows the slicing levels of the SLICER
1
and SLICER
2
signals in received waveform
105
′.)
In a conventional adaptive equalizer system
100
with a peak detector
140
, peak reference source
155
generates the appropriate ERROR signal based on the following reference ratio: the received waveform
105
′ will have an amplitude value of 2±5% volts for a transmission line
110
of zero-meter length.
However, conventional adaptive equalizer systems
100
are typically unable to fully comply with the above-mentioned 2±5% volt reference amplitude value.
Additionally, data jack
120
and decoupling transformer
125
often cause amplitude voltage loss in waveform
105
, thereby also impacting the required 2±5% volt reference voltage relied upon by peak reference source
155
. Additionally, transformer manufacturers have been unable to fully prevent the amplitude voltage loss caused by decoupling transformers
125
, partly due to variations in manufacturing processes.
Another disadvantage in conventional adaptive equalizer systems
100
is the difficulty in designing and manufacturing reliable CMOS-based peak detectors
140
. This difficulty is a result of the following factors in CMOS technology: (1) lower transconductance, (2) greater offset presented to the inputs in the differential pair, (3) the presence of CMOS drift, and (4) process variations among different manufacturers. Peak detectors
140
may be reliably designed based on bipolar technology, but these would require more integrated circuit chip surface area and consume more power.
A conventional adaptive equalizer
100
has a further disadvantage in that peak detector accuracy depends on the pattern of the transmitted waveform. For example,
FIG. 3
shows a dense-data patterned waveform
180
being received from transmission line
110
(see FIG.
1
). A high peak signal
200
(
FIG. 4
) internal to peak detector
140
can be used to accurately detect high (positive) data pulses
180
H of received dense-data patterned waveform
180
, thereby accurately measuring the waveform amplitude. For a received sparse-data patterned waveform
205
of
FIG. 4
, internal high peak signal
200
decrements in a window
210
lacking high pulses (data)
205
H. When high pulses
205
H again appear in a window
215
, the peak detector logic circuitry cannot increment high peak signal
200
to the actual peak
205
HP of a high pulse
205
H. Thus, conventional peak detectors may inaccurately measure the absolute amplitude value of received sparse-data patterned waveform
205
.
In addition, experiments have shown that “pseudo-random test patterns” (i.e., linear feedback shift register LFSR patterns of orders
11
,
15
and
23
) yield different equalization levels, since the conventional adaptive equalizer may be tuned for one pattern (e.g., LFSR order
11
) which is not optimal for another pattern (e.g., LFSR order
15
). An LSFR order determines a wav

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