Coded data generation or conversion – Digital code to digital code converters – To or from multi-level codes
Reexamination Certificate
2001-08-23
2003-02-18
Williams, Howard L. (Department: 2819)
Coded data generation or conversion
Digital code to digital code converters
To or from multi-level codes
C341S056000
Reexamination Certificate
active
06522269
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates generally to data communication interfaces and is particularly applicable to the very high-speed links required for interfacing communications components used to implement switching nodes of high-performance communications networks.
2. Description of the Related Art
In recent years, the explosive demand for bandwidth over communications networks has resulted in the development of very high-speed switching fabric devices. The availability of such devices has allowed the practical implementation of network switching nodes capable of handling aggregate data traffic in the range of hundreds of gigabits per second and, in the near future, in terabits per second. N×N switches can be viewed as black boxes, with N input ports and N output ports, aimed at moving data simultaneously from any incoming port to any outgoing port and to which very high-speed inter-node communication lines, forming a network, are indirectly attached through a line adapter. An example of a communication line is an OC-192 line, which corresponds to the level 192 of the Synchronous Optical Network (SONET) US hierarchy, equivalent to the European 64th level of the Synchronous Digital Hierarchy (SDH) and called STM-64, operating at a speed of 10 gigabits/s. A switching fabric is commonly a 16×16 or 32×32 switch, with 16 or 32 fully bi-directional ports matching the operational speed. Hence, building a switch tends to produce a large number of I/O connections since there are a large number of ports. Then, if these ports are made of parallel connections, this creates a very large number of wires to be handled through connectors on the backplane to and from the components of the switch fabric, forcing engineers to use costly board, module, and packaging solutions.
Hence, a preferred alternative is to limit the number of such connections per port while increasing their speed to the upper value compatible with the technologies in use, to reach the required bandwidth. However, as basic toggling speed increases, signal skew, when a signal on some paths arrives at a different time from a parallel a signal on a different path, becomes a limiting factor. Skew is a very serious limitation to effective use of parallel connections and control of skew is a key design issue.
Even though a link can be reduced, as shown in
FIG. 1
, to a single data connection
100
, the problem of sampling received data signal
120
still needs to be solved. Although transmitter
130
and receiver
140
have the luxury of utilizing a sampling clock derived from the same source, this might not prove to be sufficient when the toggling speed is measured in gigabits/s when using the most current chip technologies like CMOS (Complementary Metal Oxide Semiconductors).
Indeed, accumulated jitter
165
introduced by transmitter
130
and receiver
140
appears to be often bigger than bit period
160
of the transmitted signal (so there is no safe window
170
left to sample the transmitted signal) or is becoming so marginal that a high error rate would be encountered if it were not properly handled. Obviously, the situation is potentially worse if the receiving device did not have available a clock derived from a common source. In which case, expensive and complex circuitry would be needed on every link in an attempt to recover a clock from the transmitted signal. This alternate method would also need to compensate for timing variations and changes of environmental conditions.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to permit a self-delineation or self-sampling of a data communication interface so that it becomes insensitive to large timing variations.
It is another object of the present invention to provide a ternary code that allows the transmission of sequences of symbols in which consecutive symbols are always different.
It is yet another object of the present invention to provide a signal having transitions at each bit boundary.
A system and method for transmitting a binary sequence of data bits over a communication link are disclosed. The invention assumes that a ternary set of symbols are first define. They include a null symbol and two non-null symbols. Then, the binary sequence of data bits is encoded into a sequence of symbols, picked out from the ternary set of symbols, in such a way that no two consecutive symbols in the sequence are alike. The present invention assumes that, for encoding, the previously encoded non-null symbol and the previously encoded symbol must be stored in a memory system. The sequence of symbols is transmitted in lieu of the binary sequence of data bits. A decoding method and system are also disclosed in order to restore the binary sequence of data bits out of a received sequence of symbols. Decoding assumes that three symbols must be received to start recovering a bit. Also disclosed, are methods and systems for marking and detecting the sequence of symbols with breaks. The invention allows a self-delineation or self-sampling of a very-high speed data communication interface that is insensitive to large timing variations and skews.
REFERENCES:
patent: 4897854 (1990-01-01), Harris et al.
patent: 4910750 (1990-03-01), Fisher
Abbiate Jean-Claude
Blanc Alain
Le Maut Francois
Bracewell & Patterson LLP
International Business Machines - Corporation
Williams Howard L.
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