System and method for a device reliability and test circuit

Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element

Reexamination Certificate

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C324S1540PB

Reexamination Certificate

active

06636065

ABSTRACT:

BACKGROUND
The invention relates generally to reliability testing, and more specifically, to a system and method for a device reliability and test circuit.
Semiconductor devices exhibit high reliability since the electronic functions thereof are primarily performed within a solid, and this solid can be expected to retain its initial properties indefinitely, if it is not subjected to conditions beyond its limits. Semiconductor devices are being required to meet reliability levels far in excess of older types of electronic devices. Failure in semiconductor devices, such as field effect transistors, that are observed over a period of time, are principally caused by the sensitivity of these devices to slight imperfections or variations in the manufacturing processes in which submicroscopic effects play so vital a role. These imperfections are so slight that they cannot be detected by the most precise production inspection and show up only as changes in the characteristics of the device over an extended period of time. Therefore it is desirable, and in some instances, necessary, not only to test semiconductor devices for initial satisfactory operating characteristics, but to test them to determine or predict the span of the reliable operating life.
To improve the reliability of semiconductor devices, it is necessary to be able to measure reliability itself with reasonable accuracy. In many past applications, the failure rates of semiconductor devices were so low that it was impossible to measure actual failure rates under normal operating conditions. The semiconductor industry has often turned to stress acceleration testing in order to shorten the time to failure, hopefully, without introducing new failure mechanisms. Most stress, or accelerated, testing techniques known in the art rely on increases in operating temperature/voltage/current to produce failures at an earlier point in time because it is believed that increases in temperature normally will not introduce any failure mechanisms which would not be present under normal operating conditions.
Unfortunately, in the manufacture of semiconductor devices, particularly field effect transistors, not only are many failure modes present, but insufficient data exists to determine the form taken by the failure acceleration curve. Further, attempts to determine reliability of semiconductor devices are typically concerned with determining failure modes early in a failure period. Regrettably, the results of such attempts may be inconclusive for time dependent failure mechanisms. Thus, time dependent failures may be an unexpected source of costly problems.
SUMMARY
An exemplary embodiment is a system and method for a device reliability test circuit. The method includes applying a DC voltage across the device for a period, wherein the DC voltage is less than the rated voltage of said device, and determining a failure point of the device based on applying the DC voltage.


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