System and medium for placement which maintain optimized...

Details System and medium for placement which maintain optimized... System and medium for placement which maintain optimized...

2011-04-05

2011-04-05

Kik, Phallaka (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Integrated circuit design processing

Physical design processing

C716S113000, C716S123000, C716S134000, C716S136000, C703S016000

Reexamination Certificate

active

07921398

ABSTRACT:
A method for determining placement of circuitry during integrated circuit design is presented. The method includes accessing a net list identifying circuitry connections. A plurality of individual net weights are assigned to nets in timing paths within the net list. A composite net weight is determined for said timing paths, the composite net weight being in response to the plurality of individual net weights. Concurrently therewith it is advantageous to utilize our new method of improvements of concurrently proceeding to improve wireability of said design by additional timing optimization and net weight mapping modification steps.

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Ren et al., “Sensitivity Guided Net Weighting for Placement-Driven Synthesis”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 24, No. 5, May 2005, pp. 711-721.

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