Electrical transmission or interconnection systems – Personnel safety or limit control features – Interlock
Patent
1990-07-16
1993-03-02
Zazworsky, John
Electrical transmission or interconnection systems
Personnel safety or limit control features
Interlock
307277, 331107S, 505854, 505861, H03K 338, H03B 1500
Patent
active
051912368
ABSTRACT:
An electronic clock has a single Josephson junction connected in parallel to a resonant circuit, which is a delay line with a matching resistance at the input end to provide series termination. The opposite end of the delay line is an open end to reflect pulses, and the pulse transit time on the line determines the clock rate. A zero crossing detector is provided to initiate the clock operation when an input signal rises above a given threshold, and a reset circuit is included to turn off the clock when the input signal falls below this threshold. A flip-flop circuit allows the clock to be turned on by alternate initiating signal pulses. A modification includes a pulse rejuvenating circuit at the end of the delay line to offset pulse degradation. All of the circuits are fabricated with Josephson junction elements, and the zero crossing detector, reset circuit, flip-flop circuit and pulse rejuvenator circuits include dc-SQUID's. The clock is capable of operation at frequencies up to 100 GHz and can sample input single frequencies as high as 15 GHz.
REFERENCES:
patent: 3573662 (1971-04-01), Fulton
patent: 3725819 (1973-04-01), Fulton
patent: 4168441 (1979-09-01), McDonald et al.
patent: 4344052 (1982-08-01), Davidson
patent: 4468635 (1984-08-01), Lukens et al.
patent: 4983971 (1991-01-01), Przybysz et al.
M. Klein, "Josephson Junction Clock Oscillator" IBM Tech. Discl. Bulletin vol. 16, No. 7, Dec. 1973, pp. 2403-2404.
"An On-Chip Superconducting Clock with Two Modes," Lee, Silver and Sandell, IEEE Trans. Magn., vol. 25, No. 2, pp. 834-836 (Mar. 1989).
"A Josephson Analog Limiter Circuit," Petersen, Hebert and Van Duzer, IEEE Trans. Magn., vol. 25, No. 2, pp. 818-821 (Mar. 1989).
"Dynamic Behavior of a Josephson Latching Comparator for Use in a High-Speed Analog-to-Digital Converter", Petersen et al., IEEE Trans. Magn., vol. MAG23, No. 2, pp. 891-894 (Mar. 1987).
"Analog-to-Digital Conversion with Unlatched SQUID's," Hurell, Pridmere-Brown and Silver, IEEE Trans. Electron Devices, vol. ED-27, No. 10, pp. 1887-1896 (Oct. 1980).
"A DC-Powered Josephson Flip-Flop," Hebard, Pei, Dunkleberger and Fulton, IEEE Trans. Magn., vol. MAG-15, No. 1, pp. 408-411 (Jan. 1979).
MECL System Design Handbook, W. Blood, Motorola, Inc. (1983), pp. 48-59.
Hewlett--Packard Company
Zazworsky John
LandOfFree
System and circuits using Josephson junctions does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with System and circuits using Josephson junctions, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and System and circuits using Josephson junctions will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-128674