System and a method for providing an output clock signal

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Frequency or repetition rate conversion or control

Reexamination Certificate

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C327S291000

Reexamination Certificate

active

07999581

ABSTRACT:
A system for providing an output clock signal, the system includes: (a) a first clock divider, adapted to receive an input clock signal and to provide a first divider output clock signal having a frequency that is lower than a frequency of the input clock signal; and (b) a second clock divider, adapted to select a second divider input clock signal out of the input clock signal and the first divider output clock signal, and to provide the output clock signal having a frequency that is lower than the frequency of the second divider input clock signal.

REFERENCES:
patent: 6445228 (2002-09-01), Nguyen
patent: 6483888 (2002-11-01), Boerstler et al.
patent: 2003/0048118 (2003-03-01), Nguyen et al.
patent: 2003/0074595 (2003-04-01), Brock et al.
patent: 2005/0057285 (2005-03-01), Austin et al.
patent: 2006/0091928 (2006-05-01), Kapur
patent: 2008/0211560 (2008-09-01), Lam

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