Boots – shoes – and leggings
Patent
1997-03-14
1998-09-15
Teska, Kevin J.
Boots, shoes, and leggings
364488, G06F 9455
Patent
active
058089179
ABSTRACT:
Low power linear digital signal processing circuits are fabricated based on a design synthesis process using activity metrics. The average activity value .theta..sub.i of all the input nodes of the circuit is determined. Architectural transformations of the circuit are performed in order to minimize the average activity value over all the nodes. The transformation resulting in the minimum activity value is the synthesized design used as the basis for fabricating a low power linear digital signal processing circuit.
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Burch et al., McPower: A Monte Carlo Approach to Power Estimation, Aug. 1992, IEEE, pp. 90-97.
Chandrakasan et al, Hyper-LP: A System For Power Minimization Using Architectural Transformations, Aug. 1992, IEEE, pp. 300-303.
Chatterjee et al, Synthesis of Low Power Linear DSP Circuits Using Activity Metrics, Sep. 1994, IEEE, pp. 265-270.
Chatterjee Abhijit
Roy Rabindra K.
Georgia Tech Research Corporation
Loppnow Matthew Clay
NEC USA Inc.
Teska Kevin J.
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