Boots – shoes – and leggings
Patent
1977-03-24
1979-01-23
Zache, Raulfe B.
Boots, shoes, and leggings
G06F 1300
Patent
active
041363850
ABSTRACT:
The embodiments relate to special controls in a processor which eliminate synonym entries in a translation lookaside buffer (DLAT) for a system which has DLAT entries that can concurrently translate virtual addresses in multiple address spaces into real main storage addresses. The controls provide a common space bit in any segment table entry (STE) or alternatively in any page table entry (PTE) in any private address space to indicate whether the segment or page, respectively, contains programs and data private to the address space or shared by all address spaces. Each DLAT entry contains a common/private storage indictor which is set to the state of the common space bit in the STE or PTE used in an address translation loaded into the DLAT entry. When the entry is read, the private/common storage indicator controls whether the DLAT can only be used by the address space identified in the DLAT, or by all address spaces.
REFERENCES:
patent: 3725874 (1973-04-01), Van Heel
patent: 3781808 (1973-12-01), Ahearn et al.
patent: 3902163 (1975-08-01), Amdahl et al.
Gannon Patrick M.
Heller Andrew R.
Smith Ronald M.
Goldman Bernard M.
International Business Machines - Corporation
Zache Raulfe B.
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