Synchronously gated high speed CCD imager system

Television – Camera – system and detail – Solid-state image sensor

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Details

348241, 257223, H04N 5335

Patent

active

057934240

ABSTRACT:
A synchronously gated high speed CCD imager system having a predetermined frame time includes: a CCD interline transfer array including a plurality of photoelectric collection quantum wells for collecting photoelectrons from an object; a plurality of storage wells associated with the collection wells; an anti-blooming circuit for diverting photoelectrons from accumulating in the collection wells; and switching means for transferring the photoelectrons accumulated in the collection wells to the storage wells and enabling the anti-blooming circuit during synchronized portions of the frame time to divert photoelectrons from accumulating in the collection wells and for disabling the anti-blooming circuit to enable the collection wells to collect photoelectrons during another portion of the frame time.

REFERENCES:
patent: 4577115 (1986-03-01), Rentsch et al.
patent: 4809073 (1989-02-01), Chiba et al.

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