Synchronous video detector circuit using phase-locked loop

Facsimile and static presentation processing – Facsimile – Specific signal processing circuitry

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358167, 358197, 455202, H04N 544, H04B 168

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active

045243891

ABSTRACT:
In a synchronous video detector circuit using a phase-locked loop, the synchronous detection of a video IF signal is effected with a synchronous carrier signal reproduced by the PLL including a voltage-controlled oscillator. Each of a phase comparator of the PLL and a synchronous video detector has its input terminal connected to an output terminal of a video IF amplifier by untuned coupling, and arranged on the output side of the synchronous video detector is a phase-locked mode detector for detecting that the PLL is in its phase-locked mode. The phase-locked mode detector is adapted to control the band width of a low-pass filter of the PLL in either a narrow band mode or a wide band mode and the low-pass filter is controlled to operate in the narrow band mode only when the PLL is in the phase-locked mode of operation. The black and white noise included in the output signal of the synchronous video detector are both cancelled by a noise cancellation circuit including a black noise detector for pulse noise cancellation purposes.

REFERENCES:
patent: 4336616 (1982-06-01), Carson et al.

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