Synchronous type semiconductor memory device which can be adapte

Details Synchronous type semiconductor memory device which can be adapte Synchronous type semiconductor memory device which can be adapte

1996-07-23

1997-12-30

Nelms, David C.

Static information storage and retrieval

Addressing

Sync/clocking

36523008, 36518905, 365239, G11C 800

Patent

active

057038295

ABSTRACT:
In a pipeline burst EDO operation, a latency circuit 215 detects change of an internal column address strobe signal ZCASF from an active state to a non-active sate in the first cycle, and brings a signal OEMB into an active state. When a writing operation mode is specified, and an internal output enable signal ZOEF is in an active state, an output buffer control signal OEM attains an active state in response to the first activation edge of the internal column address strobe signal ZCASF after activation of the signal OEMB. Since the signal OEMB has already been in an active state in the first cycle of the signal ZCASF, a delay time for change of the signal OEM in response to activation of the signal ZCASF in the second cycle can be decreased.

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