Synchronous state counter

Details Synchronous state counter Synchronous state counter

1976-10-27

1978-06-13

Thesz, Joseph M.

Registers

Platform operated

Platform actuated traffic counters

235 92LG, 235 92R, 307224R, H03K 2324

Patent

active

040950930

ABSTRACT:
A synchronous state counter, which is responsive to an incrementing pulse for incrementing the state of the counter, is provided with a plurality of latches which output a binary representation of the number stored in the counter. Each latch is provided with a circuit for altering a state of the latch in response to a control signal. The control signal for the latch storing the least significant bit of the number is provided by the incrementing pulse. The control signals for the latches storing bits more significant than the least significant bit of the number is provided by a plurality of circuits responsive to the incrementing pulse and to the state of each latch supplying a bit less significant than the bit stored in the particular latch being controlled.

REFERENCES:
patent: 3033452 (1962-05-01), Mayne
patent: 3177474 (1965-04-01), Wagner
J. K. Crawford & C. M. Pietras, Binary Trigger Counter Control, IBM Tech Discl Bulletin, vol. 4, No. 8, Jan. 1962, p. 34.

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