Synchronous semiconductor memory device with multi-bank configur

Details Synchronous semiconductor memory device with multi-bank configur Synchronous semiconductor memory device with multi-bank configur

1999-05-25

2000-07-18

Zarabian, A.

Static information storage and retrieval

Addressing

Plural blocks or banks

36523008, G11C 800

Patent

active

060916591

ABSTRACT:
Memory blocks provided to share a sense amplifier band, a global IO (GIOB) bus provided in common to the memory blocks for transferring internal data, and local IO bus lines provided corresponding to the memory blocks are connection-controlled based on signals related to a column select operation. Driving memory blocks independently from each other permits each memory block to be used as a bank, and if one memory block is accessed during activation of another memory block, data can be prevented from colliding on the global IO bus. A main memory with high page hit rate is implemented using a semiconductor memory device with a shared-sense amplifier configuration. When a memory block sharing a sense amplifier coupled to another memory block is addressed, the another memory block is inactivated and then addressed memory block is accessed, when a valid data is output, such valid data outputting is signaled by a data valid signal.

REFERENCES:
patent: 5126973 (1992-06-01), Gallia et al.
patent: 5384745 (1995-01-01), Konishi et al.
patent: 5483497 (1996-01-01), Mochizuki et al.
patent: 5621693 (1997-04-01), Nakase
patent: 5835436 (1998-11-01), Ooishi

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