Synchronous semiconductor memory device suitable for graphic dat

Static information storage and retrieval – Addressing – Plural blocks or banks

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

36523001, 365200, G11C 1300

Patent

active

057269475

ABSTRACT:
A semiconductor memory device includes a DRAM array and an SRAM array, a write data transfer buffer for storing data from the SRAM array to the DRAM array, and a read data transfer buffer for storing data from the SRAM array to the DRAM array. These DTBR and DTBW can be accessed via an input/output buffer. The semiconductor memory device further includes a graphic data readout buffer storing only graphic data. This graphic data readout buffer provides the stored data outside the memory device via the input/output buffer, and also receives and stores graphic data from the DRAM array via the DTBR. A cache for graphic data of an optimum size can be implanted. A multimedia application specific memory device can be provided which implements an efficient graphic data cache and a high hit rate CPU cache.

REFERENCES:
patent: 4472792 (1984-09-01), Shimohigashi et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Synchronous semiconductor memory device suitable for graphic dat does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Synchronous semiconductor memory device suitable for graphic dat, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Synchronous semiconductor memory device suitable for graphic dat will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-145581

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.