Synchronous semiconductor memory device having macro command sto

Static information storage and retrieval – Addressing – Sync/clocking

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Details

36518907, 36523002, 365236, G11C 800

Patent

active

059236124

ABSTRACT:
A semiconductor memory device having a macro command function includes a macro storage section for storing a series of external instructions synchronized with a clock signal and a plurality of interval data corresponding to a number of clock pulses occurring between the external instructions. A counter is also included for counting the clock pulses and for producing an output representing a number of clock pulses occurring since an initialization of the counter, and a selecting section is included for selecting between a current external instruction synchronized with the clock signal and the external instructions read out from the macro storage section. A comparing section is included for comparing the interval data of the appropriate external instruction from the macro storage section with an output of the counter, and a macro control section is included for controlling the macro storage section in response to a macro store command so that the series of external instructions and the number of clock pulses counted by the counter are stored in the macro storage section. The macro control means also controlling the selecting section to select the macro storage section in response to a macro execute command so that the series of instructions stored in the macro storage section are sequentially read out. The macro control also produces a next command when the interval data of the read-out external instruction equals the output of the counter.

REFERENCES:
patent: 5384745 (1995-01-01), Konishi et al.
patent: 5596545 (1997-01-01), Lin
patent: 5600605 (1997-02-01), Schaefer
patent: 5668773 (1997-09-01), Zagar et al.
patent: 5708611 (1998-01-01), Iwamoto et al.

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