Synchronous semiconductor memory device having a plurality of ba

Details Synchronous semiconductor memory device having a plurality of ba Synchronous semiconductor memory device having a plurality of ba

1996-09-06

1998-11-03

Nelms, David C.

Static information storage and retrieval

Addressing

Plural blocks or banks

365233, 36523002, G11C 800

Patent

active

058319247

ABSTRACT:
One memory array is divided into a plurality of banks sharing a row of memory cells. Global IO buses are disposed for memory column blocks forming the plurality of banks included in one memory array. The global IO buses are selectively and electrically connected to the same data input/output terminal.

REFERENCES:
patent: 5404338 (1995-04-01), Murai et al.
patent: 5553026 (1996-09-01), Nakai et al.
"Semiconductor Memories", 2nd edition, Betty Prince (1991), pp. 170-171, 472-473.

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