Synchronous semiconductor memory device for reducing power...

Details Synchronous semiconductor memory device for reducing power... Synchronous semiconductor memory device for reducing power...

2006-11-21

2006-11-21

Elms, Richard (Department: 2824)

Static information storage and retrieval

Powering

Data preservation

C365S233100, C327S156000, C331S00100A

Reexamination Certificate

active

07139210

ABSTRACT:
A semiconductor memory device capable of reducing power consumption by employing a DLL drive controller. The semiconductor memory device includes: an idle state detector for detecting an idle state that all banks are precharged; a delay locked loop (DLL) for synchronizing an internal clock with an external clock; and a DLL drive controller for controlling the delay locked loop in response to an idle state detection signal outputted from the idle state detector and a delay locked signal outputted from the DLL.

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patent: 6392458 (2002-05-01), Miller, Jr. et al.
patent: 6678206 (2004-01-01), Chu et al.
patent: 6809600 (2004-10-01), Chang et al.
patent: 6987704 (2006-01-01), Park
patent: 2003/0117881 (2003-06-01), Johnson et al.
patent: 10-2002-0075572 (2002-10-01), None

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