Synchronous semiconductor memory device exhibiting an operation

Static information storage and retrieval – Addressing – Sync/clocking

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Details

365201, 36523006, G11C 800

Patent

active

060552093

ABSTRACT:
A synchronous semiconductor memory device has a pseudo internal command signal generator for generating a pseudo internal command signal which controls, in non-synchronizing with an externally inputted clock signal, an internal command signal having been generated in synchronizing with the externally inputted clock signal.

REFERENCES:
patent: 5598376 (1997-01-01), Merritt et al.
patent: 5784332 (1998-07-01), Zheng et al.
patent: 5815462 (1998-09-01), Konishi et al.

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