Synchronous semiconductor memory device allowing adjustment...

Details Synchronous semiconductor memory device allowing adjustment... Synchronous semiconductor memory device allowing adjustment...

2005-02-01

2005-02-01

Le, Thong Q. (Department: 2818)

Static information storage and retrieval

Addressing

Sync/clocking

C365S189040

Reexamination Certificate

active

06850459

ABSTRACT:
In an input/output buffer, delay control units are provided for transmitting control signals for outputting data from a data output circuit, with different propagation time in accordance with the order of data to be output, in a burst reading of data from a memory cell array.

REFERENCES:
patent: 20030217303 (2003-11-01), Chua-Eoan et al.
patent: 11-86547 (1999-03-01), None

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