Synchronous semiconductor memory circuit

Details Synchronous semiconductor memory circuit Synchronous semiconductor memory circuit

1997-06-19

1999-04-20

Yoo, Do Hyun

Static information storage and retrieval

Addressing

Particular decoder or driver circuit

36523002, 36523008, 365233, G11C 800

Patent

active

058963413

ABSTRACT:
A synchronous semiconductor memory circuit permits faster capture of data and faster transfer of internal data. The output of a master latch circuit (11) of an input register (5A) serves as an output signal (A1) of the register, and an output (RA) of a slave latch circuit (12) is fed back to the input. A multiplexer (4A) for switching between the output and an input signal (A) is disposed before an input register (5A) to control a switching signal (burst operation) depending on whether there is an external input signal to be captured. At the same time, an internal pulse (CP2) is generated by a clock edge and applied to a decoder circuit (7A) and used as a pulse forming signal.

REFERENCES:
patent: 5497355 (1996-03-01), Mills et al.

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