Synchronous semiconductor device having circuitry capable of sur

Details Synchronous semiconductor device having circuitry capable of sur Synchronous semiconductor device having circuitry capable of sur

1998-04-13

1999-05-18

Nelms, David

Static information storage and retrieval

Addressing

Sync/clocking

365201, G11C8/00

Patent

active

059056908

ABSTRACT:
A reset signal generating circuit in a synchronous semiconductor memory device outputs a reset signal ZPOR1 in response to a power on reset signal ZPOR generated immediately after power on and an initialize command (for example, a precharge command) executed for initialization after power on. A test mode register included in a mode setting circuit receives as a reset signal, the reset signal ZPOR1. Consequently, a test mode signal output attains to an NOP state, or output of the test mode signal is stopped.

REFERENCES:
patent: 5572470 (1996-11-01), McClure et al.

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