Synchronous-rectified DC to DC converter with improved...

Electricity: power supply or regulation systems – In shunt with source or load – Using a three or more terminal semiconductive device

Reissue Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C323S283000, C323S288000

Reissue Patent

active

RE038487

ABSTRACT:

FIELD OF THE INVENTION
A synchronous buck DC to DC converter typically employs a pair of switches arranged to connect one end of an inductor to either an input supply voltage or to ground. The second end of the inductor is attached to a load. It is well known to use field effect transistors (FET's) as these switches. Load current flows from the supply through the upper FET and the inductor while that FET is on, and from ground through the lower FET and the inductor while that FET is on.
It is desirable to sense the value of the load current to perform various functions such as, for example, to deliberately decrease the output voltage as load current increases (i.e., output voltage “droop”), to provide for current limiting or over-current trip to protect the load and the converter components, and in order to balance the output current being sourced by each channel in a multi-channel or multi-phase converter. The load current can be sensed through determining the DC resistance of the inductor and sensing the voltage drop across that DC resistance, or by sensing the voltage drop across an added series sense resistor. The load current can also be detected by sensing the voltage drop caused by the load current flowing through the upper FET switch. However, each of these methods has their disadvantages. Sensing the load current by using the DC resistance of the inductor requires adding an R-C filter across the inductor to remove the AC component of the current. Thus, additional components are required and extra cost incurred. Adding a series sense resistor also requires an extra component, increases cost, and reduces system efficiency. Furthermore, sensing the voltage drop across the drain-to-source resistance of the upper FET when it is conducting has often proven to be impractical, since the “on” time of that switch is typically very short.
Therefore, what is needed in the art is a DC/DC converter with improved current sensing. Furthermore, what is needed in the art is an apparatus and method which enables the sensing of load current in a DC/DC converter by sensing the voltage drop across the drain-to-source resistance of a switching FET.
Moreover, what is needed in the art is an apparatus and method which enables sensing and detection of overcurrent in a DC/DC converter.
SUMMARY OF THE INVENTION
The present invention provides a power supply with improved current sensing.
The invention comprises, in one form thereof, a DC to DC buck pulse width modulator converter circuit having an input, a high side output and a low side output. A high side switch is electrically connected between a common output node and a voltage supply, and controls a flow of current therethrough dependent upon the high side output. A low side switch is electrically connected between the common output node and ground, and controls a flow of current therethrough dependent upon the low side output. A virtual ground amplifier includes a second input electrically connected to ground. A current feedback resistor is electrically connected intermediate the common output node and a first input of the virtual ground amplifier. A variable impedance component is electrically connected to an output of the virtual ground amplifier and to the first input of the virtual ground amplifier. The impedance of the variable impedance component is varied dependent upon the output of the virtual ground amplifier. A sample and hold circuit is electrically connected intermediate the input of the pulse width modulator converter circuit and the variable impedance component. The sample and hold circuit sources a virtual ground current through the variable impedance component, and samples the virtual ground current.
An advantage of the DC/DC converter or the present invention is that it provides an improved method and apparatus to measure the voltage drop across the drain-to-source resistance of a FET having a very brief “on” time.
Another advantage of the DC/DC converter of the present invention is that the amount of droop in the output voltage in response to a change in load current is easily manipulated and scaled by selecting an appropriate value for the voltage feedback resistor.
Yet another advantage of the DC/DC converter of the present invention is that the sensitivity or magnitude of the current limiting or trip is easily manipulated or scaled by selecting an appropriate value for the voltage feedback resistor.
A still further advantage of the DC/DC converter of the present invention is that a broad range of load current and component values is accommodated by selecting an appropriate value for the current feedback resistor.


REFERENCES:
patent: 5134355 (1992-07-01), Hastings
patent: 5912552 (1999-06-01), Tateishi
patent: 6107786 (2000-08-01), Brown
patent: 6166528 (2000-12-01), Rossetti et al.
patent: 6229289 (2001-05-01), Piovaccari et al.
patent: 6288524 (2001-09-01), Tsujimoto
patent: 6396252 (2002-05-01), Culpepper et al.
patent: 6456050 (2002-09-01), Agiman

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Synchronous-rectified DC to DC converter with improved... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Synchronous-rectified DC to DC converter with improved..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Synchronous-rectified DC to DC converter with improved... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3260966

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.