Synchronous protocol encoding and decoding method

Details Synchronous protocol encoding and decoding method Synchronous protocol encoding and decoding method

1994-10-05

1997-10-07

Chin, Stephen

Pulse or digital communications

Synchronizers

Frequency or phase control using synchronizing signal

375342, 375366, 375368, 375369, 370512, 370513, 370514, 36471509, 3647151, H04L 700

Patent

active

056756178

ABSTRACT:
A method to encode and to decode frames of data used in synchronous protocols, including HDLC and SDLC. The invention operates on blocks of data, such as data bytes or data words, in a parallel rather than a bit serial manner. The invention compares an aligned block of data with reference bit sequences for flag or abort signal detection, for zero detection, for zero deletion, for detection of consecutive one bits, and for zero insertion following a stream of consecutive one bits, for encoding and decoding according to various protocols. The invention also maintains proper data alignment following such zero insertions or deletions, and provides encoding and decoding under both data overrun and data underrun conditions.

REFERENCES:
patent: 5081654 (1992-01-01), Stephenson, Jr. et al.
patent: 5465345 (1995-11-01), Blanc et al.
patent: 5517533 (1996-05-01), Szmauz et al.

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