Boots – shoes – and leggings
Patent
1990-09-28
1994-05-03
Lee, Thomas C.
Boots, shoes, and leggings
395325, 395550, 3642703, 364270, 364DIG1, G06F 112
Patent
active
053095618
ABSTRACT:
A synchronous processor unit is divided into two sections, and each separately clocked by different clock signals. One section, containing an instruction execution unit and memory for storage of instructions and data, is clocked at a higher frequency, while the other section, containing those elements of a processor unit less frequently used, are clocked with a slower-frequencied clock. The elements of each section are intercoupled by separate and independent data buses, and selectively to one another by a buffer unit. The clock signals used by both sections are produced by a clock-generating unit which also monitors the instructions being executed by the instruction execution unit. When an instruction requiring communication between the two sections is detected, at least one predetermined transition of each of the fast and slow clocks are synchronized, and during this synchronization the separate buses of each section are coupled to one another by the buffer unit for information exchanges therebetween.
REFERENCES:
patent: 4095267 (1978-06-01), Morimoto
patent: 4393464 (1983-07-01), Knapp et al.
patent: 4467413 (1984-08-01), Dshkhunian et al.
patent: 4473879 (1984-09-01), Tachiuchi et al.
patent: 4680779 (1987-07-01), Wakerly
patent: 5133064 (1992-07-01), Hotta et al.
Lenoski Daniel E.
Overhouse Leonard E.
Lee Thomas C.
Oblon Michael A.
Tandem Computers Incorporated
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