Synchronous, non return to zero bit stream detector

Details Synchronous, non return to zero bit stream detector Synchronous, non return to zero bit stream detector

1975-11-13

1976-11-30

Heyman, John S.

Demodulators

Amplitude modulation demodulator

Having specific distortion, noise or other interference...

329107, 328111, 328119, H03K 908

Patent

active

039952258

ABSTRACT:
Signals over a data channel are detected for the presence of a non return to zero, psuedo random coded bit stream which is synchronized to a clock frequency and contains submultiple harmonics thereof. The submultiple frequencies occur at discrete integer intervals ranging from 1/2 to 1/N of the clock frequency, where N is an integer dependent upon the data generation scheme.
The detection system employs an improved quadrature detector which compares narrow width window pulses, derived from the clock signal, which occur in quadrature to the encoded bit stream, with narrow width transition pulses generated at data signal transition time. In response to the synchronous occurrence of a given number of window-transition pulses per time interval, the quadrature detector produces an inhibit signal, thus indicating the absence of a detected data stream.
One system refinement is a minimum bit width detector which produces an inhibit signal if a 1/2 clock frequency submultiple is not detected within a given time interval.
A further refinement is a maximum bit width detector which produces an inhibit signal upon detecting a number of bits whose width exceeds N/2.

REFERENCES:
patent: 3271750 (1966-09-01), Padalino
patent: 3491303 (1970-01-01), Gindi
patent: 3597693 (1971-08-01), McNeilly
patent: 3601706 (1971-08-01), Battle et al.

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