Synchronous multiprocessor using tasks directly proportional in

Electrical computers and digital processing systems: multicomput – Computer-to-computer data routing – Least weight routing

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

712 30, 709103, G06F 946, G06F 1128

Patent

active

059788313

ABSTRACT:
Multiprocessor architecture having advantages of both synchronous and asynchronous architectures. The multiprocessor (FIG. 10) comprises processors (300) operating in parallel and synchronously. Each processor operates at a different rate (a), so that each processor processes a data unit (316) in a different amount of time. An input distribution function (317) receives an input stream of data and distributes it to individual processors for processing, in amounts directly proportional to the operating rates of the individual processors, so that each processor processes all of the data distributed to it in the same amount of time as the other processors. Input data buffers (301) connected to processors operate synchronously with the connected processors, receiving and storing the distributed data and inputting it to the connected processors at rates synchronized with the processors' operating rates. Output data buffers (301) operating synchronously with the processors receive and store the processed data, and output it through an output gating function (318) into an output data stream at times and at rates also synchronized with the processors' operating rates.

REFERENCES:
patent: 3781822 (1973-12-01), Ahamed
patent: 4251861 (1981-02-01), Mago
patent: 4312069 (1982-01-01), Ahamed
patent: 4316061 (1982-02-01), Ahamed
patent: 4403286 (1983-09-01), Fry et al.
patent: 4495570 (1985-01-01), Kitajima et al.
patent: 4584643 (1986-04-01), Halpern et al.
patent: 4589066 (1986-05-01), Lam et al.
patent: 4742252 (1988-05-01), Agrawal
patent: 4754398 (1988-06-01), Pribnow
patent: 4811210 (1989-03-01), McAulay
patent: 4839798 (1989-06-01), Eguchi et al.
patent: 4843540 (1989-06-01), Stolfo
patent: 4852001 (1989-07-01), Tsuhima et al.
patent: 4855903 (1989-08-01), Carleton et al.
patent: 4860201 (1989-08-01), Stolfo et al.
patent: 4866664 (1989-09-01), Burkhardt, Jr. et al.
patent: 4891787 (1990-01-01), Gifford
patent: 4954948 (1990-09-01), Hira et al.
patent: 4979097 (1990-12-01), Triolo et al.
patent: 5015884 (1991-05-01), Agrawal et al.
patent: 5031089 (1991-07-01), Liu et al.
patent: 5130984 (1992-07-01), Cisneros
patent: 5142470 (1992-08-01), Bristow et al.
patent: 5146540 (1992-09-01), Natarajan
patent: 5151623 (1992-09-01), Agrawal
patent: 5179687 (1993-01-01), Iyer
James/James, Mathematics Dictionary, 4th Edition, Van Nostrand Reinhold Company, 1976, N.Y., pp. 309-310.
D. Van Nostrand Company, Inc., The International Dictionary of Physics and Electronics, 2nd Edition, Princeton N.J., 1961, p. 907.
L. M. Ni et al., Optimal Load Balancing in a Multiple Processor System with Many Job Classes, IEEE Transactions on Software Engineering, vol. SE-11, No. 5, May 1985, pp. 491-496.
F. Bonomi et al., Adaptive Optimal Load Balancing in a Nonhomogenous Multiserver System with a Central Job Scheduler, IEEE Transactions on Computers, vol. 39, No. 10, Oct. 1990, pp. 1232-1250.
K. Deguchi et al., Integrated Parallel Image Processings on a Pipelined MIMD Multi-Processor System PSM, 10th International Conference on Pattern Recognition, Jun. 16, 1990, pp. 442-444.
Bishop et al., "Controlled Dynamic Load Balancing for a Multiprocessor System", U.S. application Serial No. 07/545,679, filed Jun. 28, 1990 which is a continuation of U.S. Serial No. 06/941,701, filed Dec. 22, 1986, now abandoned.
H. S. Stone, Introduction to Computer Architecture, Science Research Associates, Chicago, Ill., 1980, pp. 363-368.
J. P. Hayes, Computer Architecture and Organization, McGraw Hill Book Co., N.Y., 1988, pp. 209-227.
W. Stalling, Computer Organization and Architecture, MacMillan Pub. Co., N.Y., 1987, pp. 401-418.
H. S. Stone, High Performance Computer Architecture, Addison-Wesley Pub. Co., Reading, Mass., 1987, pp. 127-171.
M. M. Mano, Computer Engineering Hardware Design, Prentice-Hall, Englewood Cliffs, N.J., 1988, pp. 296-329.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Synchronous multiprocessor using tasks directly proportional in does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Synchronous multiprocessor using tasks directly proportional in , we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Synchronous multiprocessor using tasks directly proportional in will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2150130

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.