Synchronous integrated memory

Details Synchronous integrated memory Synchronous integrated memory

2005-08-09

2005-08-09

Auduong, Gene N. (Department: 2827)

Static information storage and retrieval

Addressing

Sync/clocking

C365S194000, C365S236000

Reexamination Certificate

active

06928025

ABSTRACT:
An output circuit (OUT) can be activated via an activation input (AKT), in the activated state starts an output process for data (D) to be read out, in synchronism with the first internal clock (CLKI1), and outputs the data (D) with a specific phase shift (ΔTOUT) with respect to the first internal clock (CLKI1), in synchronism with the external clock (CLKE), at a data connection (P). A counting unit (CT) starts a counting process for recording the number of successively following first levels of the first internal clock (CLKI1) as soon as a second internal clock (CLKI2), which is synchronized to the external clock (CLKE), for the first time assumes a first level while an output control signal (PAR) is at first level. It activates the output circuit (OUT) as soon as the number of successively following first levels of the first internal clock (CLKI1) has reached a predetermined value.

REFERENCES:
patent: 5796673 (1998-08-01), Foss et al.
patent: 5946244 (1999-08-01), Manning
patent: 6137328 (2000-10-01), Sung
patent: 6335901 (2002-01-01), Morita et al.
patent: 6441659 (2002-08-01), Demone

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