Synchronous graphic RAM having block write control function

Details Synchronous graphic RAM having block write control function Synchronous graphic RAM having block write control function

1997-06-26

1998-09-22

Nelms, David C.

Static information storage and retrieval

Addressing

Particular decoder or driver circuit

365233, 365194, G11C 800

Patent

active

058124853

ABSTRACT:
A synchrous graphic RAM having a block write control function, includes a column decoder for selecting a column line; a column predecoder for outputting a signal for controlling the operation of the column decoder; and a column predecoder switching portion for outputting a signal for controlling the operation of the column predecoder. The predecoder switching portion has an input stage receiving a signal enabled during read or write operation so as to perform block write operation through the column decoder's enable pulsewidth control; a delay portion for variably delaying the input signal separately for normal write and block write; and an output stage for finally outputting the output signal through the delay as the column predecorder control signal.

REFERENCES:
patent: 5497352 (1996-03-01), Magome
patent: 5673233 (1997-09-01), Wright et al.

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