Synchronous ECL to CMOS translator

Details Synchronous ECL to CMOS translator Synchronous ECL to CMOS translator

1991-01-16

1992-07-14

Hudspeth, David

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307448, H03K 19017

Patent

active

051305763

ABSTRACT:
An ECL to CMOS translator for BiCMOS circuits. The circuit has a first bipolar transistor which switches the translator from a quiescent state to an active state in the presence of an ECL high level signal. An amplifier driving an NMOS capacitive load amplifies this signal to CMOS levels. Two clock signals reset the circuit to the quiescent state once the ECL high signal has passed. The circuit is kept in the quiescent state by a current source.

REFERENCES:
patent: 4789798 (1988-12-01), Lach
patent: 4835419 (1989-05-01), Chappel et al.
patent: 4933648 (1990-06-01), Frogge
patent: 4968905 (1990-11-01), Sanwo et al.

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