Static information storage and retrieval – Addressing – Multiplexing
Patent
1991-11-14
1994-02-15
LaRoche, Eugene R.
Static information storage and retrieval
Addressing
Multiplexing
36518905, 36523008, 3652335, G11C 804
Patent
active
052873277
ABSTRACT:
A synchronous dynamic random-access memory provides data output in response to multiplexed address signals, a first control signal, a second control signal, and a clock signal, includes a memory cell array having a plurality of memory cells. Address input circuitry latches the address signals on a first transition of the clock signal selected by the first control signal to generate an X-address, and on a second transition of the clock signal selected by the second control signal to generate a Y-address. Decoding circuitry coupled to the memory cell array and the address input circuitry selects one or more memory cells in the memory cell array according to the X-address and the Y-address. Output circuitry coupled to the memory cell array outputs data from the memory cells in synchronization with the clock signal.
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LaRoche Eugene R.
Nguyen Tan
OKI Electric Industry Co., Ltd.
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