Synchronous demodulation circuit for a carrier which is amplitud

Details Synchronous demodulation circuit for a carrier which is amplitud Synchronous demodulation circuit for a carrier which is amplitud

1982-11-15

1985-02-19

Masinick, Michael A.

Facsimile and static presentation processing

Facsimile

Specific signal processing circuitry

329 50, 329109, H04N 544

Patent

active

045009228

ABSTRACT:
A demodulation circuit comprising a high-frequency amplifier (2) and a subsequent demodulator (3) the output of which is fedback to a control input of the amplifier (2) via a keyed automatic gain control circuit (5). In addition, the output is fedback to a carrier input of the demodulator (3) via a phase control circuit (11) and a phase shifter (8) to which a reference carrier (CS) is applied. The phase control circuit (11) is supplied with a pulse-shaped signal (VBS) having periodic pulses. The pulses are directly conveyed to the phase shifter (8) and they further switch a gate circuit (19-23) by means of which the demodulator output is connected to an integrating differential amplifier (26) the output of which is coupled to the phase shifter (8). After the demodulation circuit has been activated, an optimum demodulation is always present as the differential amplifier (26) cannot become saturated and a second differential amplifier (37) which has a positive feedback (42) causes a phase control range to be passed through so that no faulty stable states can occur.

REFERENCES:
patent: 3879670 (1975-04-01), Fox
patent: 3891927 (1975-06-01), Filaferro et al.
patent: 3925608 (1975-12-01), Mollet
patent: 3961135 (1976-06-01), Ohyama et al.
patent: 4443769 (1984-04-01), Aschwanden et al.

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